Flip chip technology has been widely used as it allows a high I/O count, high density interconnection scheme with proven performance and reliability. Solder bumps are deposited on contact pads on chip surfaces and the chips are then flipped and positioned such that the solder bumps are aligned with matching pads of an external circuit. Solder reflow completes the interconnection process, after which underfill material is introduced to fill the spaces about the interconnections.
Flip chip interconnection assemblies have included copper pillars having solder caps. The copper pillars and solder caps may each be formed by electroplating, which process can lead to non-uniformity in the heights of the pillars and caps. There may accordingly be more or less solder in the pillar-cap assemblies, compromising the ability to ensure reliable interconnections following reflow.
U.S. Pat. No. 6,213,386 of Inoue et al., entitled ‘Method of forming bumps,’ discloses wherein preformed solder balls and a tool having a large number of through-holes are used, and under the condition that the through-holes of the tool are aligned with the pads of the semiconductor device, the solder balls are charged into the through-holes, pressed to be fixed on the pads, and then reflowed to form bumps. This method also does not disclose forming bumps of uniform height on non-uniform copper pillars.